A Step-By-Step Guide: Surface Damage Removal for a Double Side Polish Wafer


May 12, 2020

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A double side polish wafer goes through several processes to get its mirror-like surface. Unfortunately, these processes can cause subsurface damage. Although the damage is only a few microns deep and is hidden to the naked eye, it can still affect the wafer’s performance and efficiency.To generate a stronger and more responsive wafer and die, the surface damage needs to be removed. And the best way to do this is through chemical mechanical planarization. These are the important things you need to know about CMP and the wafer polishing process.

How to polish double side polish wafer?

What Do I Need to Know About CMP for Wafer Surface Damage Removal?

Chemical Mechanical Planarization

CMP stands for Chemical Mechanical Planarization. It’s considered to be the standard method used for removing subsurface damages in a wafer. To produce a double side polish wafer, it needs to go through several processes, including wafer grinding.Wafer grinding produces subsurface damage that could go a few microns deep. Although the damage is relatively small and is invisible to the naked eye, it can still impact the performance and efficiency of the wafer.CMP can help restore the strength and efficiency of the wafer by getting rid of subsurface damage that reaches between 5-10 microns deep. It also helps reduce micro-sized peaks and valley micro-damage.

Silicon Wafer Polishing Processes

Polishing wafers don’t only give wafers a mirror-like surface but it also helps get rid of stresses and surface damage. The silicon wafer polishing process begins with a vacuum carrier holding a wafer in place, exposing its backside.Then, the vacuum and the wafer are slowly put close towards a rotating platen that contains a polishing pad. The polishing pad then carefully removes the subsurface damages on the wafer using a slow and controlled downward force. This creates a more efficient and effective double side polish wafer.

What is a double side polish wafer?

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